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STRUCTURE PRODUCT NAME TYPE FUNCTION
Silicon Monolithic Integrated Circuit IC for DCAC inverter control
For 36high voltage process/ch Full Bridge control Current, voltage feedback control Built-in soft start circuit Built-in timer-latch circuit Built-in the malfunction preventing circuit (UVLO) when lower voltage Shifting to current consumption save mode from STB terminal External PWM,DC voltage control and current linear control
ABSOLUTE MAXIMUM RATINGS Parameter Symbol Power Supply Voltage VCC Operating Temperature Range Topr Storage Temperature Range Tstg allowable loss Pd Junction Temperature Tjmax
Rating 36 -40+85 -55+150 687* +150
Unit V mW
*Reduced by 5.5mW/ when Ta=25 or over (when 70.0mmx70.0mmx1.6mm board is mounting)
OPERATING Range Parameter Power Supply Voltage Terminal Voltage (SRT,RT,VS,IS,COMP,DUT Y) Drive output frequency BCT oscillation frequency
.
Symbol VCC fOUT fBCT
Range 930 -0.35.5 3090 0.100.50
Unit V V kHz kHz
REV. A
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ELECTRICAL CHARACTERISTICSTa=25VCC=15V Rating Symbol Parameter MIN Standard
devices whole
Circuit Current at operating Circuit Current when standby
MAX
5.0 10 VCC 0.8
Unit
Condition
ICC1 ICC2 VstH VstL
2.0 -0.3
2.3 0
mA A V V System System DUTY Terminal 0.5V2.0V Burst dimming 100%0% DUTY Terminal 0.5V2.0V Burst dimming 0%100%
Standby control, SEL control Standby Terminal voltage Standby Terminal voltage

SEL Terminal voltage H
VSELH
2.4
VCC
V
SEL Terminal voltage L TimerLatch Voltage setting time Current setting time Block Active edge setting current MAX DUTY Soft start time SRT Terminal ON Resistant BLOCK Voltage starting operation Hysteresis width Feedback system IS Threshold voltage VS Threshold voltage IS Source current1 IS Source current 2 VS Source current ISCOMP Detecting voltage Output block Output voltage Output voltage Output voltage Output voltage
Output sink resistance Output source resistance
VSELL
-0.3
0.8
V
VCP ICP Iact MAXDUTY TSS RSRT VuvloH VuvloH VIS VVS IIS1 IIS2 IVS VISC VOUTPH VOUTPL VOUTNH VOUTNL RsinkP1,2 R source P1,2 RsinkN1,2 RsourceN1,2 FOUT VburH VburL FBOSC VCOMPH VCOMP
1.9 0.85 1.25/RT 44 50 6 0.15 1.225 1.210 40 0.45 VCC-0.3 VCC-10.3 8.3 48.5 1.9 0.4 337 1.9 0.1
2.0 1.0 1.5/RT 46.4 100 100 7 0.3 1.250 1.250 50 0.50 VCC VCC-9.3 9.3 0 3 6 4 6 50 2.0 0.5 350 2.00 0.2
2.1 1.15 1.75/RT 49 150 200 8 0.6 1.275 1.290 0.9 60 1.0 0.55 VCC-8.3 10.3 0.3 10 12 10 12 51.5 2.1 0.6 363 2.1 0.4
V A A % msec V V V V A A A V V V V V kHz V V Hz V V
RT=100k
DUTY=2.0V DUTY=0VIS=0.5V
Output sink resistance
Output source resistance
Drive output frequency Burst mode setting block Triangular wave upper voltage
Triangular wave lower voltage
Isink=10mA Isource=10mA Isink=10mA Isource=10mA RT=100k
Triangular wave frequency COMP Block Over-voltage detecting voltage Hysteresis width
BCT=4700pF
(It is not the radiation-proof design for this product.)
REV. A
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Dimensional outline drawing
Item No
(The max dimension with burr11.55)
BD9241
1
Lot No.
SOP18 (Unit:mm)
Block diagram
Terminal description
Terminal No 1 Terminal name N2 P2 VCC SEL CP GND SRT RT VS IS FB COMP BCT DUTY STB PGND P1 N1 Function External FET drive circuit output terminal External FET drive circuit output terminal Power terminal Dimming(POS,NEG)select terminal Timer latch setting capacity connection terminal GROUND Connecting terminal for charging discharging current setting resistance of block Connecting terminal for charging discharging current setting resistance of block Error amplifier input terminal Error amplifier input terminal Error amplifier output terminal Over-voltage detecting terminal Connecting terminal for charging and discharging current setting capacity of BOSC block. Switching terminal of PWM mode and burst mode Standby switch terminal External FET drive circuit GND terminal External FET drive circuit output terminal External FET drive circuit output terminal and OSC and OSC
STB block
2
PWM block Logic block
3
Out put block
4 5 6
F/B block
Output block
7 8
Reg block
Internal REG(5V)
Protection block
9 10 11 12 13 14 15 16 17 18
REV. A
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Usage notes
1. About the absolute maximum ratings The damage may occur If absolute maximum rating such as applied voltage and operating temperature range etc. is exceeded, moreover such destructive conditions as short mode or open mode etc. can not be assumed, so If a particular mode such as exceeding the absolute maximum rating is assumed, please consider taking physical safety measures such as fuse etc. 2. As long as being operation range, the operation of circuit function will be assured in the range of operating ambient temperature. About characteristic value, the specification value of electric characteristic can't be guaranteed, but the characteristic value doesn't change rapidly in these ranges. 3. When attaching to the printed substrate, pay special attention to the direction and proper placement of the IC. outputs or an output and the power GND. 4. Please be careful that there is a possibility of malfunction which is happening when you use it in a strong electromagnetic field. 5. The potential of GND terminal and PGND terminal is used with not over 0.3V please. 6. This IC has a built-in Temperature Protection Circuit (TSD circuit). The temperature protection circuit (TSD circuit) is only to cut off the IC from thermal runaway, and has not been designed to protect or compensate the IC. continued operation in mind. 7. Although the quality of this product has been tightly controlled the damage may occur If absolute maximum rating such as applied voltage and operating temperature range etc. is exceeded, moreover such destructive conditions as short mode or open mode etc. can not be assumed, so If a particular mode such as exceeding the absolute maximum rating is assumed, please consider taking a measures such as fuse etc. 8. Regarding the external FET, since gate voltage will be changed regarding parasitic capacity between drain gates while switching the drain voltage, please think over dispersion etc of our company's IC, please select FET with sufficient margin. 9. CP timer does not operate during the time of soft start. 10To prevent the destruction from external static electricity, please give resistance to the pin which directly link with connector etc. 11This IC is a monolithic IC, and between each element there is a P+ isolation and P substrate for element separation. There is a P-N junction and other parasitic elements formed between this P-layer and each element's N-layer, as shown in Fig. when the resistors and transistors are connected to the terminal When GND>(terminal A) at the resistance, or GND>(terminal B) at the transistor (NPN), the P-N junction operates as a parasitic diode. Also, when GND>(terminal B) at the transistor, a parasitic NPN transistor operates by the N-layer of other elements which close to the aforementioned parasitic diode. With the IC's configuration, the production of parasitic elements by the relationships of the electrical potentials is inevitable. The operation of the parasitic elements can also interfere with the circuit operation, leading to malfunction and even destruction. Therefore, uses which cause the parasitic elements to operate, such as applying voltage to the input terminal which is lower than the GND (P-substrate), should be avoided.
Resistance (Terminal A)
If the IC is attached
incorrectly, it may be destroyed. Destruction can also occur when there is a short, which can be caused by foreign objects entering between
Therefore, the user should not plan to activate this circuit with
Transistor (NPN)
()
() Terminal B

Parasitic Element

P Substrate
P Substrate

Parasitic Element
Terminal B ()
(Terminal A)
()
Parasitic Element
other elements close to
Parasitic Element
Fig.1 Simple Structure of Monolithic IC -1
REV. A
Notice
Notes
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